1. Field of the Invention
The present invention relates to a process for producing a semiconductor device. More particularly, the present invention is concerned with a process for producing a semiconductor device suitable for a device process comprising a multilayer wiring under the 0.25-xcexcm design rule or later design rules
2. Prior Art
The tendency of the scale down of semiconductor devices has increased the demand for very fine wiring and reduced wiring pitch. In addition, in accordance with the demand for low power consumption, high speed and the like, the development of interlayer dielectrics having low dielectric constant and wirings having low resistance are needed. Particularly, in logic devices, the increased resistance and the increased wiring capacitance due to very fine wirings cause the response rate of the devices to be lower. Therefore, fine multilayer wirings using low dielectric constant films as interlayer dielectrics are demanded.
The scale down of wiring width and the reduction of wiring pitch are achieved not only by increasing the aspect ratio of the wiring cross-section, but also by increasing the aspect ratio of the space between wirings. As a result, a technique for forming very fine slender-form wirings, a technique for implanting the spaces between fine wirings with interlayer dielectrics and the like must be used, thus leading to the disadvantages of the process becomes complicated and the number of steps in the process is increased.
For example, in a Damascene process in which connecting holes (e.g., via holes) and wiring trenches are simultaneously implanted with a metal (e.g., aluminum, copper or the like) by reflow sputtering and the excess metal is removed from the surface of the metal by chemical mechanical polishing (hereinafter, referred to simply as xe2x80x9cCMPxe2x80x9d), there is neither a need for forming metal wirings having a high aspect ratio by etching nor a need for implanting the narrow gaps between the wirings with interlayer dielectrics, thus making it possible to reduce considerably the number of steps in the process. The larger the aspect ratio of wiring, or the larger the total number of wirings, the more largely the Damascene process contributes to the reduction of the total production cost.
In the patterning techniques used in the conventional process for producing semiconductor devices, a resist film, which is an organic film, is used as a mask for etching. On the other hand, many of the low dielectric constant films having a dielectric constant of less than 3.0 are films containing carbon, i.e., the so-called organic films, and when such films are used as interlayer dielectrics, it is necessary to use oxygen gas as an etching gas for forming via holes in the interlayer dielectrics. For this reason, problems arise in that the resist film suffers damage and, in some cases, the resist film disappears during etching. Further, when the resist film is removed, there is a possibility that the low dielectric constant film is removed disadvantageously together with the resist film because the composition of the low dielectric constant film is close to that of the resist film. Therefore, it is difficult to perform the so-called regeneration treatment for the resist film.
In this situation, the present inventors have made extensive and intensive studies with a view toward solving the above-mentioned problems accompanying the prior art. As a result, it has been found unexpectedly that, by the process for producing a semiconductor device, which comprises the step of forming on an interlayer dielectric, a three-layer mask comprising a first mask, a second mask and a third mask in this order from the bottom, in which the first mask, the second mask and the third mask are made of materials different from one another, and the second mask is formed from a film made of a material which protects the film for forming the first mask during formation of the third mask, not only does the second mask serve as a protecting film for the ground under the first mask during formation of the third mask, so that etching using a resist mask can be conducted during formation of the third mask, and further it becomes possible to perform a regeneration treatment for the resist mask while preventing the ground under the first mask from suffering a damage, but also in that, as a material for the first mask, the same material as that for the resist mask, for example, a carbon-containing material having a low dielectric constant, can be used. The present invention has been completed, based on the above novel finding.
Accordingly, it is a primary object of the present invention to provide a process for producing a semiconductor device comprising an interlayer dielectric containing an organic film, which is advantageous not only in that etching using a resist mask can be conducted during formation of the third mask, and further it becomes possible to perform a regeneration treatment for the resist mask while preventing the ground under the first mask from suffering a damage, but also in that, as a material for the first mask, the same material as that for the resist mask can be used.
The foregoing and other objects, features and advantages of the present invention will be apparent to those skilled in the art from the following detailed description taken in connection with the accompanying drawings and the appended claims.